sponsored byIEEEACMThe International Conference for High Performance 
Computing, Networking, Storage and Analysis
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SCHEDULE: NOV 16-21, 2014

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Can We Avoid Building An Exascale "Stunt" Machine?

SESSION: Can We Avoid Building An Exascale "Stunt" Machine?

EVENT TYPE: Panels

TIME: 1:30PM - 3:00PM

Panelists:Mike Bernhardt, William Harrod, Steve Scott, Alan Gara, Terri Quinn, Thomas Sterling, Rick Stevens

ROOM:383-84-85

ABSTRACT:

While most HPC stakeholders agree there is no value to building 'stunt' machines, there is a rolling thunder of opinion that an exascale "stunt" machine may be the smart thing to do. Many believe we – the community – should collaborate (vendors, users, funding agents) to build an exascale stunt machine. This system would be a proving ground or workbench, enabling us to test and prove aspects of functionality and capability from scaling to resiliency. Others believe it would be a terrible waste of money and effort, only delaying the more fruitful efforts of building a practical exascale-class system. This panel of industry opinion shapers will debate both sides of this discussion.

This panel of HPC leaders will debate the pros and cons of going down such a path as we explore what some scientists now believe is inevitable - if we are ever going to achieve practical exaFLOPS-level performance.

Moderator/Panelist Details:

Mike Bernhardt (Moderator) - Intel Corporation

William Harrod - Department of Energy Office of Advanced Scientific Computing Research

Steve Scott - Cray Inc.

Alan Gara - Intel Corporation

Terri Quinn - Lawrence Livermore National Laboratory

Thomas Sterling - Indiana University

Rick Stevens - Argonne National Laboratory and University of Chicago

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