sponsored byIEEEACMThe International Conference for High Performance 
Computing, Networking, Storage and Analysis
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SCHEDULE: NOV 16-21, 2014

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Co-HPC: Hardware-Software Co-Design for High Performance Computing

SESSION: Co-HPC: Hardware-Software Co-Design for High Performance Computing

EVENT TYPE: Workshops

TIME: 9:00AM - 5:30PM

Organizer(s):Shirley Moore, Richard Vuduc, Gregory Peterson, Theresa Windus

ROOM:273

ABSTRACT:

Hardware-software co-design involves the concurrent design of hardware and software components of complex computer systems, whereby application requirements influence architecture design and hardware constraints influence design of algorithms and software. Concurrent design of hardware and software has been used for the past two decades for embedded systems in automobiles, avionics, mobile devices, and other such products, to optimize for design constraints such as performance, power, and cost. HPC is facing a similar challenge as we move towards the exascale era, with the necessity of designing systems that run large-scale simulations with high performance while meeting cost and energy consumption constraints. This workshop will invite participation from researchers who are investigating the interrelationships between algorithms/applications, systems software, and hardware, and who are developing methodologies and tools for hardware-software co-design for HPC. http://codaash.org/co-hpc/

Chair/Organizer Details:

Shirley Moore - University of Texas at El Paso

Richard Vuduc - Georgia Institute of Technology

Gregory Peterson - University of Tennessee, Knoxville

Theresa Windus - Iowa State University

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