sponsored byIEEEACMThe International Conference for High Performance 
Computing, Networking, Storage and Analysis
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SCHEDULE: NOV 16-21, 2014

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From "Hello World" to Exascale Using x86, GPUs and Intel Xeon Phi Coprocessors

SESSION: From "Hello World" to Exascale Using x86, GPUs and Intel Xeon Phi Coprocessors

EVENT TYPE: Tutorials

TIME: 8:30AM - 5:00PM



Both GPUs and Intel Xeon Phi coprocessors can provide a teraflop/s performance. Working source code will demonstrate how to achieve such high performance using OpenACC, OpenMP, CUDA, and Intel Xeon Phi. Key data structures for GPUs and multi-core such as low-wait counters, accumulators, and massively-parallel stack will be covered. Short understandable examples will walk students from “Hello World” first programs to exascale capable computation via a generic mapping for numerical optimization that demonstrates near-linear scaling on conventional, GPU, and Intel Xeon Phi based leadership class supercomputers. Students will work hands-on with code that actually delivers a teraflop/s average performance per device plus MPI code that scales to the largest leadership class supercomputers, and leave with the ability to solve generic optimization problems including data intensive PCA (Principle Components Analysis), NLPCA (Nonlinear Principle Components), plus numerous machine learning and optimization algorithms. A generic framework for data intensive computing will be discussed and provided. Real-time visualization and video processing will also be covered because GPUs make superb big-data visualization platforms.

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