sponsored byIEEEACMThe International Conference for High Performance 
Computing, Networking, Storage and Analysis
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SCHEDULE: NOV 16-21, 2014

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A Framework for Resource Aware Multithreading

SESSION: Poster Reception

EVENT TYPE: Posters, Best Poster Finalist

TIME: 5:15PM - 7:00PM

AUTHOR(S):Sunil Shrestha, Joseph Manzano, Andres Marquez, John Feo, Guang Gao

ROOM:New Orleans Theater Lobby


In this poster, we present a novel methodology that takes into consideration multithreaded many-core designs to increase both intra and inter tile parallelism as well as memory residence on tilable applications. It partly takes advantage of polyhedral analysis and transformation, combined with a highly optimized fine grain tile runtime to exploit parallelism at multiple levels of the memory hierarchy. The main contributions include (1) a framework for multi-hierarchical tiling techniques that takes advantage of intra-tile parallel-start parallelism, (2) a data-flow inspired runtime library that allows the expression of parallelism with an efficient synchronization registry (3) and an efficient memory reuse strategy. Our current implementation shows significant performance improvements on an Intel Xeon Phi board against instances produced by state-of-the-art compiler frameworks for selected loop nests.

Chair/Author Details:

Sunil Shrestha - University of Delaware

Joseph Manzano - Pacific Northwest National Laboratory

Andres Marquez - Pacific Northwest National Laboratory

John Feo - Pacific Northwest National Laboratory

Guang Gao - University of Delaware

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