sponsored byIEEEACMThe International Conference for High Performance 
Computing, Networking, Storage and Analysis
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SCHEDULE: NOV 16-21, 2014

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Power Shifting Opportunities on BG/Q Using Memory Throttling

SESSION: Poster Reception


TIME: 5:15PM - 7:00PM

AUTHOR(S):Bo Li, Edgar A. Leon

ROOM:New Orleans Theater Lobby


Power and energy efficiency are major concerns for future exascale systems. Achieving the expected levels of application performance in these power-constrained systems will be challenging. Thus, it is important to understand how an application utilizes power throughout its different phases in order to maximize performance under the operating power budget. The goal is to shift power to the resources on the application’s critical path on a code-region basis. In this project, we identify power shifting opportunities for LULESH and pF3D, two applications from Lawrence Livermore National Laboratory. Using a linear regression model to predict the minimum memory speed without affecting performance, we dynamically throttle the memory system on a per-region or per-kernel basis. The results from an IBM Blue Gene/Q system show that we can save a significant amount of dynamic power at a marginal performance cost. Resources on the critical path could use this power to improve application performance.

Chair/Author Details:

Bo Li - Virginia Polytechnic Institute and State University

Edgar A. Leon - Lawrence Livermore National Laboratory

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