sponsored byIEEEACMThe International Conference for High Performance 
Computing, Networking, Storage and Analysis
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SCHEDULE: NOV 16-21, 2014

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Practical considerations for HPC systems architecture

SESSION: Hardware and Architecture

EVENT TYPE: Exhibitor Forums

TIME: 4:30PM - 5:00PM

SESSION CHAIR: Richard Evans

Presenter(s):Jean-Pierre Panziera

ROOM:292

ABSTRACT:

Designing HPC systems for optimal application performance requires a tight integration of the compute elements, the interconnect and the storage system while minimizing cost and energy consumption. This presentation describes Bull’s approach to HPC systems architecture and illustrate the concepts on some recent installations.
The compute nodes are based on a combination of CPUs or HPC accelerators depending on the application profile. The interconnect based on InfiniBand is configured with a compact fat-tree topology. The storage nodes which aggregate a huge capacity (PBs) are carefully placed into the network fabric in order to provide fast data access with full bandwidth (100s GB/s) and high availability. For lower cost, the platform integrates compute nodes and parts of the interconnect. The direct liquid cooling technology minimizes the energy consumption required for cooling and thus reduces operating costs.
Finally, the key ideas guiding the current developments for Bull next generation system are explained.

Chair/Presenter Details:

Richard Evans (Chair) - Texas Advanced Computing Center

Jean-Pierre Panziera - Bull

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