sponsored byIEEEACMThe International Conference for High Performance 
Computing, Networking, Storage and Analysis
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SCHEDULE: NOV 16-21, 2014

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NEC SX-ACE Vector Supercomputer and Future Direction

SESSION: HPC Futures and Exascale

EVENT TYPE: Exhibitor Forums

TIME: 11:30AM - 12:00PM

SESSION CHAIR: Wesley Bland

Presenter(s):Shintaro Momose

ROOM:292

ABSTRACT:

NEC gives an overview of the latest model vector supercomputer SX-ACE with its future direction in high-performance computing. NEC has launched SX-ACE by aiming at much higher sustained performance particularly for memory-intensive applications. It is designed based on the big core strategy targeting higher sustained performance. It provides both the world top-level single core performance of 64 GFlops and the world highest memory bandwidth per core of 64 GBytes/s. Four cores, memory controllers, and network controllers are integrated into a single CPU LSI, enabling the CPU performance of 256 GFlops and the memory bandwidth of 256 GBytes/s with a 64 GB memory capacity. In the target memory-intensive application areas, SX-ACE demonstrates both higher sustained performance and power efficiency, surpassing other supercomputers. NEC will also talk about the vision and concept of its future supercomputer products.

Chair/Presenter Details:

Wesley Bland (Chair) - Argonne National Laboratory

Shintaro Momose - NEC Corporation

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