sponsored byIEEEACMThe International Conference for High Performance 
Computing, Networking, Storage and Analysis
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SCHEDULE: NOV 16-21, 2014

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A New Node Design for HPC

SESSION: Wednesday Emerging Technologies Presentations

EVENT TYPE: HPC Impact Showcase & Emerging Technologies

TIME: 4:00PM - 4:30PM

ROOM:Show Floor - 233 Theater

ABSTRACT:

Current trends in processor technology have led to bottlenecks in memory latency, data movement, and storage. A need exists to accelerate practical exascale computing by focusing on power efficiency, simplicity of component design, and hierarchically designed systems. The only way to build a truly high performance computing system capable of meeting exascale demands and beyond is to design the simplest and thus most efficient processing unit, without sacrificing functionality or scalability.

System Fabric Works (SFW) and REX Computing have been jointly developing a full node architecture centered around a new processor approach that is optimized for HPC. We propose to build a grid of many (potentially thousands of) Multiple Instruction, Multiple Data (MIMD) cores to execute instructions independently, drastically reducing the demands on memory bandwidth and thus greatly increasing the efficiency at which typical HPC workloads may be performed.

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