sponsored byIEEEACMThe International Conference for High Performance 
Computing, Networking, Storage and Analysis
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SCHEDULE: NOV 16-21, 2014

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FPGA Development Tools and HMC/FPGA Architectures

SESSION: Emerging Technologies Exhibits

EVENT TYPE: HPC Impact Showcase & Emerging Technologies

TIME: 7:00PM - 9:00PM

ROOM:Show Floor - 233 Exhibits


Convey has developed an OpenMP compiler that accepts standard OpenMP syntax and outputs a thread level intermediate language – HT (Hyper_Threading Tools). The HT tool sets, further compiles the intermediate language to Verilog.

The system developed can be used to create “FPGA personalities” for Convey developed hardware platforms. These platforms range from PCI cards, complete compute nodes, and systems that use HMC memory architectures

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